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Traditionally, engineers have designed LSIs using hardware description languages such as VHDL or Veriog. But these languages are far from ideal: they are low-level, hard to learn, not suitable for software design, designs written in them can be hard to modify and simulation is slow. Recently, research has focussed on using C (or dialects of C) for LSI design and employing high-level synthesis tools to turn the C programs into register-transfer-level (RTL) VHDL or Verilog.
Sharp has developed its own C language for LSI design, called Bach C. Bach C is based on ANSI C with some extensions for hardware, namely a par construct for specifying parallelism, synchronous channels, shared memory and bit-true operations. The semantics of the language is untimed, and so users specify the behaviour of hardware without worrying about when operations will take place. Sharp has also developed a simulation and debugging environment for Bach C, and a high-level synthesis tool for turning Bach C programs into RTL-VHDL.
In this talk I will describe the Bach C language and give an overview of the Bach compiler. I will then give some examples of industrial-scale designs that have been developed using the Bach system. Finally, I will describe our future work on incorporating the Bach compiler into a codesign environment.
