Portable assembler and other oxymorons
Lattice QCD simulations are computationally intensive,
and require multiple teraflop-years of effort to solve.
In this context it is imperative to extract the best
possible performance from a processor.
We have written a portable code generator for high performance
assembler kernels required by Lattice QCD simulations for a number
of risc architectures. This results in a significant performance
improvement over current optimising compilers.
Please contact our
webadmin with any comments or changes.
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