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Institute for Computing Systems Architecture

Per Stenstrom
Chalmers University of Technology Goteborg, Sweden


ICSA SEMINAR SERIES TALK
MONDAY, 12 MAY 2008
JCMB, ROOM 2511
1530HRS

Techniques for Reduction of Misspeculation Penalties in Transactional Memory Systems

Abstract:

As we embark on the multicore roadmap the most pressing issue is how to make it easier for the software to exploit the performance of multicore computers. To this end, transactional memory is one promising path. Transactional memory can potentially relieve the programmer from investing significant efforts in orchestrating fine-grain synchronization. It does so by allowing coarse-grain critical sections to be executed concurrently by multiple threads and yet maintaining the same semantics as far as atomicity. When data races are detected, conflicting threads are forced to execute one after the other by allowing only a single thread to commit whereas the others have to roll-back and re-execute. We have noticed that proposed solutions to conflict resolution in hardware transactional systems (HTM) may result in significant execution losses due to misspeculation and are also prone to starvation.

In this talk, I will first frame the problems in the context of an HTM system with lazy conflict resolution. I will then present our innovative solutions to avoid starvation and to reduce the execution losses due to misspeculations. We have incorporated these techniques in a simulation model of a multicore system extended with HTM. I will finally present the results of our experimental evaluation of our proposed techniques.


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