The concept of processor mappings is provided in order to define a mapping of abstract processor arrays to abstract node arrays. Based on processor mappings, the compiler can derive from usual data mappings an inter-node and an intra-node data mapping. The inter-node data mapping controls distributed-memory parallelization with respect to the nodes of a cluster, while the intra-node data mapping controls shared-memory parallelization within nodes.
Additional mechanisms are proposed for specifying inter- and intra-node data mappings explicitly, for controlling specific shared-memory parallelization issues, and for integrating OpenMP routines in HPF applications. The proposed features are being realized within the ADAPTOR and VFC compiler. The parallelization strategy for clusters of SMPs adopted by these compilers is discussed as well as a hybrid-parallel execution model based on a combination of MPI and OpenMP. Early experimental results indicate the effectiveness of the proposed features.